VHDL synthesis based on GHDL and Yosys

This plugin provides a shared library module for Yosys to implement logical synthesis of VHDL designs.


Packageghdl-yosys-plugin 6.0.0
Channelguix-science
Definitionguix-science/packages/electronics.scm
Build statusview 🚧
Home pagehttps://github.com/ghdl/ghdl-yosys-plugin
SourceSource code archival status at Software Heritage.